Processor companies target next level NFV and SDN environments

Broadcom and Xilinx lay down products aimed at enabling higher performing SDN and NFV rollouts.

The development of Software Defined Networks alongside the deployment of virtualised network functions will place new demands on supporting system and chip platforms.

Two companies – Broadcom and Xilinx – have each today launched new products aimed at enabling more flexible and faster NFV and SDN rollouts.

Softly soft approach in data plane from Xilinx
Xilinx has announced a product that it says will enable the data plane in SDNs to be programmable, as well as the control plane.

It says it has done this by developing a new Software Defined Specification Environment for Networking (SDNet), with functional specifications compiled into Xilinx’s FPGAs and SoCs.

It calls its concept Softly Defined Networks, rather than Software Defined Networks. It says that this is because it is based on a programmable data plane with content-intelligence and a southbound API control plane connection.

“In contrast to traditional SDN architectures, which employ fixed data plane hardware with a narrow southbound API connection to the control plane, Softly Defined Networks are based upon a programmable data plane with content-intelligence and a rich southbound API control plane connection.” (Press release)

Benefits
Xilinx says that chief benefits of benefits of its Softly Defined Network solutions enabled by SDNet and its FPGAs and SoCs include:
Support of wire speed services that are independent of protocol complexity
Provisioning of per-flow, flexible services
Support for revolutionary in-service “hitless” upgrades while operating at 100 percent line rate
Improved, highly flexible Quality of Service (QoS)
Flow and session aware capabilities
Fully programmable hardware data plane and I/O
Support for NFV at wire speed including user defined, custom capabilities
Scalable line rates from 1G to 400G

“The first phase of SDN (Software Defined Networking) enables data centre and WAN operators to customise and improve their network in software. In the next phase, we can expect a drive beyond fixed-function hardware data planes.

“Adding high-level programmability and more sophisticated functionality to the data plane, accessed via standard software APIs, means that networking resources will be managed more intelligently and efficiently, increasing the rate of innovation,” said Nick McKeown, professor of computer science at Stanford University.

Full Release from Xilinx.

In order to facilitate a successful industry-wide NFV rollout, HP’s OpenNFV program requires a new class of processors that can improve packet processing, help reduce hardware costs, simplify applications and improve time-to-market

Broadcom
Meanwhile Broadcom announced the expansion of its XLPII processor family with the XLP500 Series, which features 32 NXCPUs and 80 Gbps performance. Broadcom claimed that equates to “up to 4X the per-core performance of competing processors”.

Broadcom is positioning the XLP500 Series as an enabler of NFV and SDN deployments, because of its increased processing performance and “agility”.

“Performance is achieved with an quad-issue, quad-threaded superscalar architecture with out-of-order execution. Support for Broadcom’s Open NFV platform and seamless interoperability with Broadcom’s StrataXGS Switch Series streamlines the development process, optimises power requirements, reduces hardware costs and improves time-to-market.” (Press release)

Linley Gwennap, Principal Analyst at The Linley Group and Editor-in-Chief of the Microprocessor Report, said,”The combination of four-issue superscalar execution and four-way multithreading is unique among embedded processors and the XLP500 Series raises the bar for embedded processors that are optimised for communications.”

One company integrating the Broadcom product into its own is HP.

“In order to facilitate a successful industry-wide NFV rollout, HP’s OpenNFV program requires an open platform to easily migrate virtual functions across systems and a new class of processors that can improve packet processing, help reduce hardware costs, simplify applications and improve time-to-market,” said Vinay Saxena, Chief Architect, Network Functions Virtualisation, Hewlett Packard.

FULL BROADCOM RELEASE

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