Picocom boosts Open RAN sector with ORANIC

Board integrates functionality for Open small cell model. Gets system integrators to market quicker.

One of the proposed benefits of Open RAN is that, by disaggregating the functional aspects of the radio network, it will foster speedier product innovation and encourage new market entrants.

That will help relieve a strategic weakness for the industry – reliance on too few technology providers – and also give operators more levers to pull to build optimised networks for specific target use cases or deployments.

One company hoping to benefit from this environment is Picocom, which has launched an Open RAN network interface card (NIC) based on its small cell PC802 chip.

The ORANIC board, featuring the four integrated Picocom chips. (as mock-ups here)

The ORANIC is a board designed to underpin O-DU or an O-RU products for manufacturers developing these functions for small cells-based Open RAN networks. The PC802 chip that it is based on will be sampling in Q3 this year, according to Peter Claydon, President, Picocom.

“We’ve got the ORANIC boards now several months ahead of having the chips, which is slightly unusual. But the reason for that is that we have to design the high speed interfaces together as one package with the chip itself, and then do some simulations of everything together to make sure that the interfaces work. And so as part of that you end up designing a board.”

That board is the ORANIC, which is based on four PC802 chips, and can support either O-DU or O-RU designs, Claydon says. As an  O-DU it can support up to 16 RUs over an intergrated, open fronthaul interface.

“The ORANIC has two uses, one in a O-DU, supporting the upper PHY and that direct connection to Ethernet for a fronthaul eCPRI interface which is completely integrated into the device. And the chip can also be in an O-RU where the eCPRI interface gets turned around to connect to the DU. In that mode the lower PHY is being used and that’s connected to transceivers to connect the RFFE.”

The PC802 chip also has a use in a completely integrated small cell which Claydon said will be more likely to be a Split 6 small cell where  the upper and lower PHY layers reside on the remote unit. That small cell opportunity remains Picocom’s main target for its chip design, but Claydon senses an opportunity for the ORANIC in the small cell and private network Open RAN space, where current SoC solutions are not necessarily a good fit for deployment use cases.

“It wasn’t something we thought initially. We are a chip company and we will have customers who buy hundreds of thousands of chips from us and create their own products. But our Director of Engineering said one day we could do this board, so we proposed it to some prospective customers and we got a very good response from that.” Claydon says that in particular anyone who is looking at products for in-building deployments, and/or private network deployments, is a good fit.

“System integrators can take the board, put it into a standard server, add some RUs on and from a hardware perspective they have a solution that works. There will also be people who need to get into the market with a solution like this,” he added.

The Open RAN market is attracting a lot of chip developer interest. Qualcomm is targeting a new range of O-RAN targeted platforms from 2022, to support RUs and DUs from small cell up to macro layers. EdgeQ spies opportunity at the edge. Intel‘s FlexRAN has been the basis for many O-RAN aligned implementations. But Open RAN small cells are a different challenge.

As Claydon tells it Qualcomm’s current small cell chipset is based on its smartphone X55 modem, so works well for an integrated small cell (such as the newly announced Nokia Smart Nodes) but comes with some scale limitations , whilst Intel’s FlexRAN reference platform is based on its Xeon server chip, which Claydon says is too power hungry for small cell and distributed product designs.

“Qualcomm is putting forward the view of inline acceleration so you have a tight integration of the processors and the hardware that goes with them. Marvell is targeting macrocells with beam forming capability in their chips and they have the same sort of view. We focussed on small cells, by which we really mean anything that doesn’t involve massive MIMO. When you put m-MIMO in you are putting a scale there which implies a cost and power dissipation which is something that is not appropriate for small cells.”